The nature of asynchronous transfer mode (ATM) is such that cell loss and cell delays are important issues which must be addressed. An essential requirement of an ATM network is that the network must be able to handle multiple traffic classes with different quality of service (QOS) requirements while maximising statistical sharing and utilisation of network resources and minimising cell loss and cell delay.
An implementation of ATM is specified in international standards and industry agreements. The ATM cell format consists of a 5-byte header and 48-byte information field. The main purpose of the cell header is identification of the required virtual path and virtual channel. Other header fields allow identification of payload type, forward-congestion indication, cell loss priority (CLP), and header error control (HEC).
ATM switching systems are network elements that support the functions of cell transport, connection admission control (CAC), traffic control and network management. While standards specify the network functions, they do not specify their implementation at the switch level. Broadly speaking, an ATM switch comprises a set of input ports and output ports through which the switch is interconnected to users, other switches, and other network elements. Cells are received by input modules at the switch input ports and prepared for routing through the switch. The routing is performed by a cell switch fabric. Finally, the cells are prepared for transmission by output modules at the switch output ports. The input modules, output modules, and cell switch fabric together perform the basic cell routing and buffering functions required in ATM switching.
At each input port, an initial function of an input module is the extraction and delineation of a received ATM cell stream. The cells must then be prepared for routing through the cell switch fabric. This involves checking the cell header for errors, validation and translation of the virtual path identifier (VPI) and virtual channel identifier (VCI) values, determination of the destination output port and the addition of an internal tag. The internal tag may, for example, include information relating to internal routing such as the destination output port, loss tolerance, delay priority and broadcast/multicast connection identifier. Since the internal tag exists only within the switch, its contents are determined entirely by the design of the switch. The internal tag is subsequently removed at the output modules.
The output modules perform many of the reverse functions of the input modules. Their primary task is to prepare ATM cell streams for physical transmission.